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Notes
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Certificates are not for attendance.
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Reference(s)
The slides are compilation of books below.
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License
Universities and colleges are allowed to use it on condition that we are
informed ahead and we issued a written approval.
Please, do not use in any commercial activity without written permission
from:
Swift Act Servces
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Outline
Basic Definitions
Cyclic Executives
Interrupt-Driven Executives
Preemptive Executives
Conclusion
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System
A system processes inputs and generates outputs.
For every input, we need to determine:
Occurrence (periodic or aperiodic)
Response time (fixed or bounded)
Turnaround time (fixed or bounded)
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Event
Time
Response
Time
Turnaround time
Result
Real-Time System = Correct Functions
@Correct Time
They can be:
Hard: Correct time is unnegotiable
Soft: Correct time can be tolerated
Factors determining real- time behavior of a system are:
Determinism (predictability)
Responsiveness
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Importance of Real-Time in
Systems
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Multitasking
Executing separate tasks (seemingly) simultaneously
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Multitasking Types
Non-preemptive multitasking
Pre-emptive multitasking
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Task = C Function + Timing C/C’s
Execution Time (E)
Deadline (D)
Period (P)
Blockage (B)
For a task to be schedulable:
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Exercise: Compare Multitasking Requirements
from Multitasking Types PoV
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Preemptive Non-Preemptive
Context Switching
Scheduling
Intertask Interaction
Case Study: Digital Clock
The digital clock displays time the
format “HH.MM”.
Only 24 hours format
HH is hours and MM is minutes.
The “.” is used to separate hours
from minutes.
The digital clock is adjustable.
User can adjust hours or
minutes.
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Exercise 1: Identify Needed Tasks
What are the needed tasks to implement the digital clock?
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Cyclic Executive - The Super Loop
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µController
CPU IO 1
IO 2
IO N
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Exercise 2: The Super Loop
Write the digital clock in the form of a super loop.
Identify the timing c/c’s of your tasks from your code.
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Multi-Rate Cyclic Executive – The
Super Loop
Not all tasks running @ same rate.
Some tasks need higher rate.
Integer multiple of base rate
Major cycle/Minor cycle(s)
Major Cycle = 1 or more Minor cycle(s)
If we have a set of tasks with periods P1, P2, ... Pn then:
Major cycle = LCM (P1, P2, ... Pn)
Minor cycle = HCF (P1, P2, ... Pn)
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Switch Driver Design
Sampling switch state periodically where period > de-bounce period (~20
ms)
According to the state of the latest 3 samples, the switch state stored can
be changed into one of:
1. Released
2. Pre-Pressed
3. Pressed
4. Pre-Released
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Switch Voltage
Level
Sampling Pulses
7 Segment Display Driver Design
Changing port data periodically
Rate of change of all all SSD is > 20 Hz and less than 50 Hz
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Exercise 3: The Super Loop Revisited
Calculate the periods of your tasks .
Identify minor cycle and major cycle lengths.
Draw system timeline.
Rewrite your super loop to achieve this timeline.
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Cyclic Executive - The Super Loop
Revisited
Pros
Simple
Minimal HW resources
Highly portable
Cons
Inaccurate timing
High power consumption
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Features of sEOS
Can run tasks @ specified rates
ISR’s are easy to manage in high-level language.
Framework to develop embedded systems
Puts the processor “to sleep” between tasks:
To conserve power
To reduce task jitter
Easily portable to other controllers
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sEOS Library
sEOS_Init() Initializes sEOS with needed tick rate
sEOS_GoToSleep() Puts the processor to sleep when nothing to be
done
sEOS_ISR() Called periodically to does what the system should do
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The Super Loop Refactored
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The Super Loop – Re-factored
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Schedulability Check for sEOS
P = HCF (T1, ..., TM)
TICK = HCF (P1, ..., PN)
Sum (E1, ..., EZ) in a tick < TICK over a Major Cycle = LCM (P1, ..., PN)
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Exercise 4: sEOS
Rewrite your super loop and sEOS_ISR to achieve your timeline.
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Interrupt-Driven Executive -
Foreground/Background cont’d
Pros
No upfront cost
Minimal training required
No need to set aside memory resources to accommodate RTOS
Cons
Difficult to ensure that each operation will meet its deadline
High-priority code must be placed in the foreground
Sharing data is not OK!
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Exercise 5: Interrupt-Driven Executive
What are the needed ISRs?
What are the needed tasks?
What are the needed communication?
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Preemptive Executive - RTOS
RT = Correct function @ Correct
time
OS = HW + SW manager
RTOS = HW + SW manager that
can help us ensure having correct
function @ correct time
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µController
CPU IO 1
IO 2
IO N
RTOS
RTOS = Kernel + …
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Application
RTOS
Hardware
File System
GUI
TCP/IP
USB
Bluetooth
RS-232
Kernel
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RTOS Scheduling
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Interrupt-level
scheduling
Task-level
scheduling
RTOS Benefits
Developers who use RTOS are freed from implementing a scheduler and
related services
Typically applications that incorporate RTOS are much easier to expand
The best RTOS have undergone thorough testing
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Exercise 6: RTOS
How will you change the interrupt-driven implementation to use RTOS?
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Conclusion
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Responsiveness
Determinism
Time-
Triggered
Cyclic
Executive
Interrupt-
Driven
Executive
RTOS