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4/10/2017
1
Embedded Software
Architectures
Prerequisite(s)
 Programming in any high-level programming language preferably C
 Knowledge of µ-controller programming is a plus
4/10/2017Embedded Software Architectures 2
4/10/2017
2
Notes
 Ask any time.
 Cell phones silent, please!
 Certificates are not for attendance.
4/10/2017Embedded Software Architectures 3
Reference(s)
 The slides are compilation of books below.
4/10/2017Embedded Software Architectures 4
4/10/2017
3
License
 Universities and colleges are allowed to use it on condition that we are
informed ahead and we issued a written approval.
 Please, do not use in any commercial activity without written permission
from:
 Swift Act Servces
4/10/2017Embedded Software Architectures 5
Outline
 Basic Definitions
 Cyclic Executives
 Interrupt-Driven Executives
 Preemptive Executives
 Conclusion
4/10/2017Embedded Software Architectures 6
4/10/2017
4
System
 A system processes inputs and generates outputs.
 For every input, we need to determine:
 Occurrence (periodic or aperiodic)
 Response time (fixed or bounded)
 Turnaround time (fixed or bounded)
4/10/2017Embedded Software Architectures 7
Event
Time
Response
Time
Turnaround time
Result
Real-Time System = Correct Functions
@Correct Time
 They can be:
 Hard: Correct time is unnegotiable
 Soft: Correct time can be tolerated
 Factors determining real- time behavior of a system are:
 Determinism (predictability)
 Responsiveness
4/10/2017Embedded Software Architectures 8
4/10/2017
5
Importance of Real-Time in
Systems
4/10/2017Embedded Software Architectures 9
Multitasking
 Executing separate tasks (seemingly) simultaneously
4/10/2017Embedded Software Architectures 10
4/10/2017
6
Multitasking Types
 Non-preemptive multitasking
 Pre-emptive multitasking
4/10/2017Embedded Software Architectures 11
Task = C Function + Timing C/C’s
 Execution Time (E)
 Deadline (D)
 Period (P)
 Blockage (B)
 For a task to be schedulable:
4/10/2017Embedded Software Architectures 12
4/10/2017
7
Embedded Code
4/10/2017Embedded Software Architectures 13
Multitasking Requirements
Multitasking
Context Switching
Scheduling
Intertask Interaction
4/10/2017Embedded Software Architectures 14
4/10/2017
8
Exercise: Compare Multitasking Requirements
from Multitasking Types PoV
4/10/2017Embedded Software Architectures 15
Preemptive Non-Preemptive
Context Switching
Scheduling
Intertask Interaction
Case Study: Digital Clock
 The digital clock displays time the
format “HH.MM”.
 Only 24 hours format
 HH is hours and MM is minutes.
 The “.” is used to separate hours
from minutes.
 The digital clock is adjustable.
 User can adjust hours or
minutes.
4/10/2017Embedded Software Architectures 16
4/10/2017
9
Exercise 1: Identify Needed Tasks
 What are the needed tasks to implement the digital clock?
4/10/2017Embedded Software Architectures 17
Cyclic Executive - The Super Loop
4/10/2017Embedded Software Architectures 18
µController
CPU IO 1
IO 2
IO N
4/10/2017
10
Exercise 2: The Super Loop
 Write the digital clock in the form of a super loop.
 Identify the timing c/c’s of your tasks from your code.
4/10/2017Embedded Software Architectures 19
Multi-Rate Cyclic Executive – The
Super Loop
 Not all tasks running @ same rate.
 Some tasks need higher rate.
 Integer multiple of base rate
 Major cycle/Minor cycle(s)
 Major Cycle = 1 or more Minor cycle(s)
 If we have a set of tasks with periods P1, P2, ... Pn then:
 Major cycle = LCM (P1, P2, ... Pn)
 Minor cycle = HCF (P1, P2, ... Pn)
4/10/2017Embedded Software Architectures 20
4/10/2017
11
Switch Driver Design
 Sampling switch state periodically where period > de-bounce period (~20
ms)
 According to the state of the latest 3 samples, the switch state stored can
be changed into one of:
1. Released
2. Pre-Pressed
3. Pressed
4. Pre-Released
4/10/2017Embedded Software Architectures 21
Switch Voltage
Level
Sampling Pulses
7 Segment Display Driver Design
 Changing port data periodically
 Rate of change of all all SSD is > 20 Hz and less than 50 Hz
4/10/2017Embedded Software Architectures 22
4/10/2017
12
Exercise 3: The Super Loop Revisited
 Calculate the periods of your tasks .
 Identify minor cycle and major cycle lengths.
 Draw system timeline.
 Rewrite your super loop to achieve this timeline.
4/10/2017Embedded Software Architectures 23
Cyclic Executive - The Super Loop
Revisited
 Pros
 Simple
 Minimal HW resources
 Highly portable
 Cons
 Inaccurate timing
 High power consumption
4/10/2017Embedded Software Architectures 24
4/10/2017
13
Time-Triggered Cyclic Executive (sEOS)
4/10/2017Embedded Software Architectures 25
Time-Triggered Cyclic Executive (sEOS)
4/10/2017Embedded Software Architectures 26
4/10/2017
14
Features of sEOS
 Can run tasks @ specified rates
 ISR’s are easy to manage in high-level language.
 Framework to develop embedded systems
 Puts the processor “to sleep” between tasks:
 To conserve power
 To reduce task jitter
 Easily portable to other controllers
4/10/2017Embedded Software Architectures 27
sEOS Library
 sEOS_Init()  Initializes sEOS with needed tick rate
 sEOS_GoToSleep()  Puts the processor to sleep when nothing to be
done
 sEOS_ISR()  Called periodically to does what the system should do
4/10/2017Embedded Software Architectures 28
4/10/2017
15
The Super Loop Refactored
4/10/2017Embedded Software Architectures 29
The Super Loop – Re-factored
4/10/2017Embedded Software Architectures 30
4/10/2017
16
Schedulability Check for sEOS
 P = HCF (T1, ..., TM)
 TICK = HCF (P1, ..., PN)
 Sum (E1, ..., EZ) in a tick < TICK over a Major Cycle = LCM (P1, ..., PN)
4/10/2017Embedded Software Architectures 31
Exercise 4: sEOS
 Rewrite your super loop and sEOS_ISR to achieve your timeline.
4/10/2017Embedded Software Architectures 32
4/10/2017
17
Interrupt-Driven Executive -
Foreground/Background
4/10/2017Embedded Software Architectures 33
µController
CPU IO 1
IO 2
IO N
Interrupt-Driven Executive -
Foreground/Background cont’d
4/10/2017Embedded Software Architectures 34
4/10/2017
18
Interrupt-Driven Executive -
Foreground/Background cont’d
 Pros
 No upfront cost
 Minimal training required
 No need to set aside memory resources to accommodate RTOS
 Cons
 Difficult to ensure that each operation will meet its deadline
 High-priority code must be placed in the foreground
 Sharing data is not OK!
4/10/2017Embedded Software Architectures 35
Exercise 5: Interrupt-Driven Executive
 What are the needed ISRs?
 What are the needed tasks?
 What are the needed communication?
4/10/2017Embedded Software Architectures 36
4/10/2017
19
Preemptive Executive - RTOS
 RT = Correct function @ Correct
time
 OS = HW + SW manager
 RTOS = HW + SW manager that
can help us ensure having correct
function @ correct time
4/10/2017Embedded Software Architectures 37
µController
CPU IO 1
IO 2
IO N
RTOS
RTOS = Kernel + …
4/10/2017Embedded Software Architectures 38
Application
RTOS
Hardware
File System
GUI
TCP/IP
USB
Bluetooth
RS-232
Kernel
4/10/2017
20
Kernel
4/10/2017Embedded Software Architectures 39
Objects
Services
Scheduler
Kernel
Scheduler
4/10/2017Embedded Software Architectures 40
Algorithm
Dispatcher
Scheduler
4/10/2017
21
RTOS Scheduling
4/10/2017Embedded Software Architectures 41
Interrupt-level
scheduling
Task-level
scheduling
RTOS Benefits
 Developers who use RTOS are freed from implementing a scheduler and
related services
 Typically applications that incorporate RTOS are much easier to expand
 The best RTOS have undergone thorough testing
4/10/2017Embedded Software Architectures 42
4/10/2017
22
Exercise 6: RTOS
 How will you change the interrupt-driven implementation to use RTOS?
4/10/2017Embedded Software Architectures 43
Conclusion
4/10/2017Embedded Software Architectures 44
Responsiveness
Determinism
Time-
Triggered
Cyclic
Executive
Interrupt-
Driven
Executive
RTOS
4/10/2017
23
Contact Us
 https://www.facebook.com/groups/EmbeddedSystemsTraining/
 https://www.youtube.com/channel/UC5NTpGcnlx3XwGAlFaYJnBg
 www.swift-act.com
 training@swift-act.com
 (+2)0122-3600-207
4/10/2017Embedded Software Architectures 45

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Embedded software architectures

  • 1. 4/10/2017 1 Embedded Software Architectures Prerequisite(s)  Programming in any high-level programming language preferably C  Knowledge of µ-controller programming is a plus 4/10/2017Embedded Software Architectures 2
  • 2. 4/10/2017 2 Notes  Ask any time.  Cell phones silent, please!  Certificates are not for attendance. 4/10/2017Embedded Software Architectures 3 Reference(s)  The slides are compilation of books below. 4/10/2017Embedded Software Architectures 4
  • 3. 4/10/2017 3 License  Universities and colleges are allowed to use it on condition that we are informed ahead and we issued a written approval.  Please, do not use in any commercial activity without written permission from:  Swift Act Servces 4/10/2017Embedded Software Architectures 5 Outline  Basic Definitions  Cyclic Executives  Interrupt-Driven Executives  Preemptive Executives  Conclusion 4/10/2017Embedded Software Architectures 6
  • 4. 4/10/2017 4 System  A system processes inputs and generates outputs.  For every input, we need to determine:  Occurrence (periodic or aperiodic)  Response time (fixed or bounded)  Turnaround time (fixed or bounded) 4/10/2017Embedded Software Architectures 7 Event Time Response Time Turnaround time Result Real-Time System = Correct Functions @Correct Time  They can be:  Hard: Correct time is unnegotiable  Soft: Correct time can be tolerated  Factors determining real- time behavior of a system are:  Determinism (predictability)  Responsiveness 4/10/2017Embedded Software Architectures 8
  • 5. 4/10/2017 5 Importance of Real-Time in Systems 4/10/2017Embedded Software Architectures 9 Multitasking  Executing separate tasks (seemingly) simultaneously 4/10/2017Embedded Software Architectures 10
  • 6. 4/10/2017 6 Multitasking Types  Non-preemptive multitasking  Pre-emptive multitasking 4/10/2017Embedded Software Architectures 11 Task = C Function + Timing C/C’s  Execution Time (E)  Deadline (D)  Period (P)  Blockage (B)  For a task to be schedulable: 4/10/2017Embedded Software Architectures 12
  • 7. 4/10/2017 7 Embedded Code 4/10/2017Embedded Software Architectures 13 Multitasking Requirements Multitasking Context Switching Scheduling Intertask Interaction 4/10/2017Embedded Software Architectures 14
  • 8. 4/10/2017 8 Exercise: Compare Multitasking Requirements from Multitasking Types PoV 4/10/2017Embedded Software Architectures 15 Preemptive Non-Preemptive Context Switching Scheduling Intertask Interaction Case Study: Digital Clock  The digital clock displays time the format “HH.MM”.  Only 24 hours format  HH is hours and MM is minutes.  The “.” is used to separate hours from minutes.  The digital clock is adjustable.  User can adjust hours or minutes. 4/10/2017Embedded Software Architectures 16
  • 9. 4/10/2017 9 Exercise 1: Identify Needed Tasks  What are the needed tasks to implement the digital clock? 4/10/2017Embedded Software Architectures 17 Cyclic Executive - The Super Loop 4/10/2017Embedded Software Architectures 18 µController CPU IO 1 IO 2 IO N
  • 10. 4/10/2017 10 Exercise 2: The Super Loop  Write the digital clock in the form of a super loop.  Identify the timing c/c’s of your tasks from your code. 4/10/2017Embedded Software Architectures 19 Multi-Rate Cyclic Executive – The Super Loop  Not all tasks running @ same rate.  Some tasks need higher rate.  Integer multiple of base rate  Major cycle/Minor cycle(s)  Major Cycle = 1 or more Minor cycle(s)  If we have a set of tasks with periods P1, P2, ... Pn then:  Major cycle = LCM (P1, P2, ... Pn)  Minor cycle = HCF (P1, P2, ... Pn) 4/10/2017Embedded Software Architectures 20
  • 11. 4/10/2017 11 Switch Driver Design  Sampling switch state periodically where period > de-bounce period (~20 ms)  According to the state of the latest 3 samples, the switch state stored can be changed into one of: 1. Released 2. Pre-Pressed 3. Pressed 4. Pre-Released 4/10/2017Embedded Software Architectures 21 Switch Voltage Level Sampling Pulses 7 Segment Display Driver Design  Changing port data periodically  Rate of change of all all SSD is > 20 Hz and less than 50 Hz 4/10/2017Embedded Software Architectures 22
  • 12. 4/10/2017 12 Exercise 3: The Super Loop Revisited  Calculate the periods of your tasks .  Identify minor cycle and major cycle lengths.  Draw system timeline.  Rewrite your super loop to achieve this timeline. 4/10/2017Embedded Software Architectures 23 Cyclic Executive - The Super Loop Revisited  Pros  Simple  Minimal HW resources  Highly portable  Cons  Inaccurate timing  High power consumption 4/10/2017Embedded Software Architectures 24
  • 13. 4/10/2017 13 Time-Triggered Cyclic Executive (sEOS) 4/10/2017Embedded Software Architectures 25 Time-Triggered Cyclic Executive (sEOS) 4/10/2017Embedded Software Architectures 26
  • 14. 4/10/2017 14 Features of sEOS  Can run tasks @ specified rates  ISR’s are easy to manage in high-level language.  Framework to develop embedded systems  Puts the processor “to sleep” between tasks:  To conserve power  To reduce task jitter  Easily portable to other controllers 4/10/2017Embedded Software Architectures 27 sEOS Library  sEOS_Init()  Initializes sEOS with needed tick rate  sEOS_GoToSleep()  Puts the processor to sleep when nothing to be done  sEOS_ISR()  Called periodically to does what the system should do 4/10/2017Embedded Software Architectures 28
  • 15. 4/10/2017 15 The Super Loop Refactored 4/10/2017Embedded Software Architectures 29 The Super Loop – Re-factored 4/10/2017Embedded Software Architectures 30
  • 16. 4/10/2017 16 Schedulability Check for sEOS  P = HCF (T1, ..., TM)  TICK = HCF (P1, ..., PN)  Sum (E1, ..., EZ) in a tick < TICK over a Major Cycle = LCM (P1, ..., PN) 4/10/2017Embedded Software Architectures 31 Exercise 4: sEOS  Rewrite your super loop and sEOS_ISR to achieve your timeline. 4/10/2017Embedded Software Architectures 32
  • 17. 4/10/2017 17 Interrupt-Driven Executive - Foreground/Background 4/10/2017Embedded Software Architectures 33 µController CPU IO 1 IO 2 IO N Interrupt-Driven Executive - Foreground/Background cont’d 4/10/2017Embedded Software Architectures 34
  • 18. 4/10/2017 18 Interrupt-Driven Executive - Foreground/Background cont’d  Pros  No upfront cost  Minimal training required  No need to set aside memory resources to accommodate RTOS  Cons  Difficult to ensure that each operation will meet its deadline  High-priority code must be placed in the foreground  Sharing data is not OK! 4/10/2017Embedded Software Architectures 35 Exercise 5: Interrupt-Driven Executive  What are the needed ISRs?  What are the needed tasks?  What are the needed communication? 4/10/2017Embedded Software Architectures 36
  • 19. 4/10/2017 19 Preemptive Executive - RTOS  RT = Correct function @ Correct time  OS = HW + SW manager  RTOS = HW + SW manager that can help us ensure having correct function @ correct time 4/10/2017Embedded Software Architectures 37 µController CPU IO 1 IO 2 IO N RTOS RTOS = Kernel + … 4/10/2017Embedded Software Architectures 38 Application RTOS Hardware File System GUI TCP/IP USB Bluetooth RS-232 Kernel
  • 20. 4/10/2017 20 Kernel 4/10/2017Embedded Software Architectures 39 Objects Services Scheduler Kernel Scheduler 4/10/2017Embedded Software Architectures 40 Algorithm Dispatcher Scheduler
  • 21. 4/10/2017 21 RTOS Scheduling 4/10/2017Embedded Software Architectures 41 Interrupt-level scheduling Task-level scheduling RTOS Benefits  Developers who use RTOS are freed from implementing a scheduler and related services  Typically applications that incorporate RTOS are much easier to expand  The best RTOS have undergone thorough testing 4/10/2017Embedded Software Architectures 42
  • 22. 4/10/2017 22 Exercise 6: RTOS  How will you change the interrupt-driven implementation to use RTOS? 4/10/2017Embedded Software Architectures 43 Conclusion 4/10/2017Embedded Software Architectures 44 Responsiveness Determinism Time- Triggered Cyclic Executive Interrupt- Driven Executive RTOS
  • 23. 4/10/2017 23 Contact Us  https://www.facebook.com/groups/EmbeddedSystemsTraining/  https://www.youtube.com/channel/UC5NTpGcnlx3XwGAlFaYJnBg  www.swift-act.com  training@swift-act.com  (+2)0122-3600-207 4/10/2017Embedded Software Architectures 45